d a t a sh eet product speci?cation supersedes data of march 1988 file under integrated circuits, ic06 december 1990 integrated circuits 74hc/hct9114 nine wide schmitt trigger buffer; open drain outputs; inverting for a complete data sheet, please also download: the ic06 74hc/hct/hcu/hcmos logic family specifications the ic06 74hc/hct/hcu/hcmos logic package information the ic06 74hc/hct/hcu/hcmos logic package outlines
december 1990 2 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 features schmitt trigger action on all data inputs output capability: standard (open drain) i cc category: msi general description the 74hc/hct9114 are high-speed si-gate cmos devices and are pin compatible with low power schottky ttl (lsttl). they are specified in compliance with jedec standard no. 7a. the 74hc/hct9114 are nine wide schmitt trigger inverting buffer with open drain outputs and schmitt trigger inputs. the schmitt trigger action in the data inputs transform slowly changing input signals into sharply defined jitter-free output signals. the 74hc/hct9114 have open-drain n-transistor outputs, which are not clamped by a diode connected to v cc . in the off-state, i.e. when one input is low, the output may be pulled to any voltage between gnd and v omax . this allows the device to be used as a low-to-high or high-to-low level shifter. for digital operation and or-tied output applications, these devices must have a pull-up resistor to establish a logic high level. the 9114 is identical to the 9115 but has inverting outputs. quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6 ns notes 1. c pd is used to determine the dynamic power dissipation (p d in m w): p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz f o = output frequency in mhz ? (c l v cc 2 f o ) = sum of outputs c l = output load capacitance in pf v cc = supply voltage in v 2. for hc the condition is v i = gnd to v cc for hct the condition is v i = gnd to v cc - 1.5 v ordering information see 74hc/hct/hcu/hcmos logic package information . symbol parameter conditions typical unit hc hct t phl / t plz propagation delay a n to y n c l = 15 pf; v cc = 5 v 12 13 ns c i input capacitance 3.5 3.5 pf c pd power dissipation capacitance per buffer notes 1 and 2 5 5 pf
december 1990 3 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 pin description pin no. symbol name and function 1, 2, 3, 4, 5, 6, 7, 8, 9 a 0 to a 8 data inputs 10 gnd ground (0 v) 19, 18, 17, 16, 15, 14, 13, 12, 11 y 0 to y 8 data outputs 20 v cc positive supply voltage fig.1 pin configuration. fig.2 logic diagram. al fpage mba015 1 2 3 4 5 6 7 8 9 a 8 a 0 a 3 a 1 a 5 a 4 a 2 a 6 a 7 y 8 y 0 y 3 y 1 y 5 y 4 y 2 y 6 y 7 19 18 12 14 15 11 13 16 17 fig.3 iec logic diagram. a lfpage 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 mba014
december 1990 4 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 function table notes 1. h = high voltage level l = low voltage level z = high impedance off-state inputs outputs a n y n l h z l fig.4 functional diagram. fig.5 logic diagram (one schmitt trigger). mba021 a n gnd y n handbook, halfpage
december 1990 5 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 dc characteristics for 74hc for the dc characteristics see 74hc/hct/hcu/hcmos logic family specifications . transfer characteristics are given below. output capability: standard i cc category: msi transfer characteristics for 74hc voltages are referred to gnd (ground = 0 v) ac characteristics for 74hc gnd = 0 v; t r =t f = 6 ns; c l = 50 pf symbol parameter t amb ( c) unit test conditions 74hc v cc (v) waveforms +25 - 40 to +85 - 40 to +125 min. typ. max. min . max. min. max. v t+ positive-going threshold 0.70 1.75 2.30 1.13 2.37 3.11 1.50 3.15 4.20 0.70 1.75 2.30 1.50 3.15 4.20 0.70 1.75 2.30 1.50 3.15 4.20 v 2.0 4.5 6.0 fig.6 v t - negative-going threshold 0.30 1.35 1.80 0.70 1.80 2.43 1.10 2.40 3.30 0.30 1.35 1.80 1.10 2.40 3.30 0.30 1.35 1.80 1.10 2.40 3.30 v 2.0 4.5 6.0 fig.6 v h hysteresis (v t+ - v t - ) 0.2 0.4 0.5 0.43 0.57 0.68 0.80 1.00 1.10 0.18 0.40 0.50 0.80 1.00 1.10 0.15 0.40 0.50 0.80 1.00 1.10 v 2.0 4.5 6.0 fig.6 symbol parameter t amb ( c) unit test conditions 74hc v cc (v) waveforms +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. t phl / t plz propagation delay a n to yn 36 13 10 110 22 19 140 28 24 165 33 28 ns 2.0 4.5 6.0 fig.7 t thl output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 fig.7
december 1990 6 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 dc characteristics for 74hct for the dc characteristics see 74hc/hct/hcu/hcmos logic family specifications . transfer characteristics are given below. output capability: standard i cc category: msi note to hct types the value of additional quiescent supply current ( d i cc ) for a unit load of 1 is given in the family specifications. to determine d i cc per input, multiply this value by the unit load coefficient shown in the table below. transfer characteristics for 74hct voltages are referred to gnd (ground = 0 v) ac characteristics for 74hct gnd = 0 v; t r =t f = 6 ns; c l = 50 pf input unit load coefficient a n 0.3 symbol parameter t amb ( c) unit test conditions 74hct v cc (v) waveforms +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. v t+ positive-going threshold 0.9 1.2 1.50 1.70 2.0 2.1 0.9 1.2 2.0 2.1 0.9 1.2 2.0 2.1 v 4.5 5.5 fig.6 v t - negative-going threshold 0.7 0.8 1.06 1.27 1.4 1.7 0.7 0.8 1.4 1.7 0.7 0.8 1.4 2.7 v 4.5 5.5 fig.6 v h hysteresis (v t+ - v t - ) 0.2 0.2 0.44 0.44 0.8 0.8 0.2 0.2 0.8 0.8 0.2 0.2 0.8 0.8 v 4.5 5.5 fig.6 symbol parameter t amb ( c) unit test conditions 74hct v cc (v) waveforms +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. t phl / t plz propagation delay a n to y n 17 31 39 47 ns 4.5 fig.7 t thl output transition time 7 15 19 22 ns 4.5 fig.7
december 1990 7 philips semiconductors product speci?cation nine wide schmitt trigger buffer; open drain outputs; inverting 74hc/hct9114 transfer characteristic waveforms ac waveforms package outlines see 74hc/hct/hcu/hcmos logic package outlines . fig.6 transfer characteristic. fig.7 waveforms showing the input (a n ) to output ( y n ) propagation delays and the output transition times. handbook, full pagewidth mba024 a n input y n output 10 % t pzl t f t r v m (1) 10 % 90 % t plz t thl v m (1) (1) hc : v m = 50%; v i = gnd to v cc . hct: v m = 1.3 v; v i = gnd to 3 v.
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